Optical processing system

ABSTRACT

An optical processing and correlation system is described in which each user is assigned a unique code as its identity. When a user wishes to establish a communication link with another user, it encodes the unique identity of the latter (representing the destination address) and broadcasts to all other users. On reception, each receiver correlates its own unique address with the received signal. If the received signal has arrived at the correct destination, then the correlator output is a maximum; this is known as auto-correlation. Alternatively, if the received signal arrives at an incorrect destination, the correlator output is a minimum, known as cross-correlation. Thus, by monitoring the correlator output, desired and undesired signals can be identified by an all-optical network. Various embodiments of the invention are described. In one aspect of the optical processing arrangement of the present invention, each raw data or information data bit, is coded into one period of a code sequence according to the following rules: (a) if the data is &#34;1&#34;, it is coded into a code sequence x. (b) If the data is &#34;0&#34;, it is coded into a code sequence x. The generated code sequences (x or x) has a further coding stage. Each &#34;1&#34; in the sequence (x or x) is translated to two bits separated by time T; for example (01) or (10). Each zero is translated into a complementary pair, that is (10) or (01), respectively, in a preferred arrangement each &#34;1&#34; is translated into (01) and each &#34;0&#34; is translated into (10). A &#34;0&#34; signifies no light pulse whilst a &#34;1&#34; signifies the presence of a light pulse. The digits of (01) or (10) are separated by the time T.

The present invention relates to an optical processing system and to amethod of processing optical data.

BACKGROUND OF THE INVENTION

The use of optical transmission media, such as optical fibres andintegrated optics, as a high bandwidth channel, is insufficient byitself to implement high-capacity optical processing networks. Theultimate capacity of the channel will be limited by the processing speedof the associated electronics circuitry. Current stage-of-the-artelectronic processing speeds are limited in the region of 1 GHz.However, optical processing methods potentially offer much higherprocessing throughput so that speeds may be pushed up to about 100 GHz.

Several fibre-optic networks utilising high bandwidth optical processinghave been proposed recently. One such arrangement is based on an opticalsignal processor disclosed in international patent applicationPublication No. WO90/04823 in the name of the University of Strathclyde.In this arrangement, the optical signal processor and the method ofprocessing provided a binary digit transformation so that afterprocessing the digits, non-binary bits may be created. This requiredspecial non-standard circuitry to be manufactured to process thenon-binary data. The special fabrication requirements for this circuitmay limit the potential widespread use of the optical signal processordisclosed in the above publication.

SUMMARY OF THE INVENTION

An object of the present invention is to obviate or mitigate at leastone of the aforementioned problems.

This is achieved by providing an optical processing and correlationsystem and assigning each user a unique code as its identity. When auser wishes to establish a communication link with another user, itencodes the unique identity of the latter (representing the destinationaddress) and broadcasts to all other users. On reception, each receivercorrelates its own unique address with the received signal. If thereceived signal has arrived at the correct destination, then thecorrelator output is a maximum; this is known as auto-correlation.Alternatively, if the received signal arrives at an incorrectdestination, the correlator output is a minimum, known ascross-correlation. Thus, by monitoring the correlator output, desiredand undesired signals can be identified by an all-optical network.

In one aspect of the optical processing arrangement of the presentinvention, each raw data or information data bit, is coded into oneperiod of a code sequence according to the following rules:

(a) If the data is "1" it is coded into a code sequence x.

(b) If the data is "0", it is coded into a code sequence x.

The generated code sequences (x or x) have a further coding stage. Each"1" in the sequence x (or x) is translated to two bits separated by timeT; for example (01) or (10). Each zero is translated into acomplementary pair, that is (10) or (01), respectively, in a preferredarrangement each "1" is translated into (01) and each "0" is translatedinto (10). An "0" signifies no light pulse whilst a "1" signifies thepresence of a light pulse. The digits of 01 or (10) are separated by thetime T.

A fundamental difference exists between optical processing andconventional electronic processing as regards correlater architecture.The correlator weights/taps take the values +1 and -1 in the electronicprocessor and +1 and 0 in the optical processor. A previously reportedbiopolar tap is an exception of the latter category; Fibre Optic BipolarTap Implementation using an Incoherent Optical Source, Shabeer et al,Optical Letters, vol. 12, page 726, 1987. Coherent processing has beenreported as being possible in principle, Prucnal, P. et al, SpreadSpectrum Fibre Optic Local Area Network using Optical Processing,Journal of Light Wave Technology, vol. LT-4 No 5 May 1986, and shouldallow +1/-1 taps to be realised but is not yet practical at present.

According to one aspect of the present invention there is provided anoptical processing system for identifying when an incoming opticalsignal has reached its correct destination, said optical processingsystem comprising,

data transmission means for transmitting optical signal data, dataencoding means coupled to said data transmission means and to an opticaltransmission medium, and a data receiver coupled to said opticaltransmission medium,

said data encoding means comprising first encoding means for encoding abinary `1` into a first code sequence and for encoding a binary `0` intoa second code sequence, second encoding means for encoding each binary`1` in the first and second code sequences into a first pair of digits,and for encoding each binary zero in the first and second code sequencesinto a second pair of digits, the second pair of digits being thecomplement of the first pair of digits, the digits in each of said firstand said second pair of digits being separated by time T,

said data receiver having at least one optical coupling stage, the oreach optical coupling stage having an optical coupler with a `1`coupling ratio, the coupling stage having a principal channel with atime delay T and a coupled channel, the location of the time delay Trelative to the optical coupler determining whether the receiver is a 10or a 01 coupling stage,

each data receiver providing an output over a period of time atintervals of T and the arrangement being such that the data for opticalcoupling stages provides an odd number of 2N-1 outputs where N is thenumber of stages, and means for monitoring the value of Nth digit, todetermine if the incoming signal has reached its correct destination.

Preferably each optical coupling stage has two optical couplers, oneoptical coupling stage having a coupling ratio of `0` and the otheroptical coupling stage having a coupling ratio of `1`, the couplersbeing coupled by a principal optical channel with a time delay T betweensaid couplers and also being coupled by a coupled optical channel.

Conveniently, said data receiver has M optical coupling stages forreceiving a code sequence of M pairs of double- coded data, each opticalcoupling stage having an output coupled to a common M to 1 coupler unitand means for monitoring the output of the M to 1 coupler unit which isbeing capable of detecting a complete match, a complete mismatch or apartial mismatch of data by said data receiver.

Preferably, also said data receiver has a 3-optical coupler stageconnected to the output Of the M to 1 coupler unit, each coupler in said3-optical coupler stage having a `1` coupling ratio, the outputs of thefirst and third stages forming a first input to a comparator and theoutput of the second stage forming a second input to the comparator, thecomparator having an output which can be monitored to detect receivedsignals which are matched or mismatched, the matched signal having anamplitude of +M where M is the number of stages in the opticalprocessor.

Preferably, the output of the M to 1 coupler unit is coupled to areceiver output processing unit which, if the correct data has beenreceived at the receiver, controls a switch to allow the correctlyidentified data to be processed subsequently by the correct user.

In another aspect of the invention, a block of data, a data header, isassigned an address each `1` and `0` of which is coded by coding meansinto 10 or 01 as required to form a header which is then fed to thereceiver output processing unit which includes gate means actuated by anexternal trigger and by a signal indicative of the correct header beingreceived by the receiving stage to control a switch means to allow datafollowing the header to be passed to the correct user. Alternatively,the trigger is derived from a pulse from a data header once the opticalprocessing unit is filled.

Conveniently, an add-subtraction unit is incorporated in the outputprocessing stage for determining if the correct signal has been receivedby the receiver, the add/subtraction unit having an output coupled tosaid gate means. The add/subtraction unit may be an electro-optical oran optical device.

According to another aspect of the invention, there is provided a methodof processing optical data so that a desired optical signal can becorrectly identified and received by a receiver, and so that undesiredsignals can be rejected, said method comprising the steps of,

a) at a transmission location, identifying whether a data bit is abinary `1` or a binary `0`;

b) if the data bit is "1", coding the bit into a first code sequence,and if the data bit is "0" coding the bit into a second code sequencedifferent from the first code sequence;

c) coding each "1" in said first and second code sequences into a firstpair of binary digits (01) or (10) and coding each "0" in said first andsecond code sequences into a second pair of binary digits, (10) or (01)respectively, the second pair of digits being complementary to the firstpair of digits, the digits of each 01 and 10 pair being separated bytime T;

d) receiving the encoded data from an optical transmission medium in atleast one optical coupling stage provided by at least one opticalcoupler having a coupling ratio of binary `1`, each optical couplerstage having a coupling value set to 01 or to 10 to provide a hardwarerepresentation of 01 or 10 coding, respectively,

e) processing the output of the coupling stage to provide 2N-1 outputseach separated by time T where N is the number of coupling stages andN=2, 3, 4 and

f) monitoring the Nth output for the presence of a desired digitalsignal, the presence of the digital signal in said Nth output above acertain preset threshold indicating a match, that is, the desired signalhad been received at the correct receiving station.

Preferably, the desired digital signal is a binary 1.

Preferably, a plurality of M coupling stages are provided and theoutputs in each stage are connected in parallel to an M to 1 coupler forsumming the outputs to determine the degree of matching.

Preferably also, the method includes the step of processing the outnutof the M to 1 coupler in a 3-coupler stage with each coupler having a"1" coupling ratio and coupling the first and third couplers in said3-coupler stage to a first input of a comparator, and coupling thesecond coupler to a second input of said comparator, said first andsecond inputs of said comparator being compared and providing an outputsignal from which the degree of matching or mismatching can bemonitored.

According to another aspect of the present invention where is provided areceiver for use with an optical coupling system, said receivercomprising a plurality of optical coupling stages, each optical couplingstage having at least one optical coupler, each optical coupler beingcoupled by a principal channel with a time delay of T associated withthe coupler of each stage and each stage being separated by a time delayof at least T, the location of the time delay T in each stagedetermining whether the stage is an 01 or 10 coupler, each couplerhaving a coupled channel connected to an M to 1 coupler for summing theoutputs of all of the coupling stages to provide a combined output, thecombined output determined whether the correct data has been received inthe receiver.

Preferably each stage has two optical couplers, one coupler having an`0` coupling ratio and the other coupler having a `1` coupling ratio.The time delay between stages is 2T for multi-user applications.

Preferably, said data receiver has M optical coupling stages forreceiving a code sequence of M pairs of double-coded data, each opticalcoupling stage having an output coupled to a common M to 1 coupler unit,and means for monitoring the output of the M to 1 coupler unit which isbeing capable of detecting a complete match, a complete mismatch or apartial mismatch of data by said data receiver.

Preferably, also said data receiver has a 3-optical coupler stageconnected to the output of the M to 1 coupler unit, each coupler in said3-coupler stage having a `1` coupling ratio, the outputs of the firstand third stages forming a first input to a comparator and the output ofthe second stage forming a second input to the comparator, thecomparator having an output which can be monitored to detect receivedsignals which are matched or mismatched, the matched signal having anamplitude of +M where M is the number of stages in the opticalprocessor.

Preferably, the output of the M to 1 coupler unit is coupled to areceiver output processing unit which, if the correct data has beenreceived at the receiver, controls a switch to allow the correctlyidentified data to be processed subsequently by the correct user.

These and other aspects of the invention will become apparent from thefollowing description when taken in combination with the accompanyingdrawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic representation of the two coding stages forconverting raw data into a group of pairs for processing by the opticalprocessing apparatus;

FIGS. 2A and 2B are diagramatic optical hardware representations of each1 (01) and 0 (10) at the destination address;

FIGS. 3a to d are Iinput-Coupler-Unit combinations for different inputsequences;

FIG. 4 is an input-output truth table for the coupler/unit combinationshown in FIG. 3;

FIG. 5 is a schematic representation of the architecture of an opticalcorrelator with M stages for receiving a code sequence having M pairs ofdouble coded data;

FIG. 6 a and b are schematic representations of 3-coupler stagesfollowed by detection and amplification apparatus to permit multi-useroperation;

FIGS. 7a and 7b are schematic representations which depict a combinationof the input/coupler unit shown in FIG. 1 with the M to 1 coupler shownin FIG. 6a, and depicts the two matching conditions;

FIGS. 8a and 8b are similar to FIGS. 7a and 7b and show the arrangementwhen the outputs are mismatched;

FIG. 9 is a truth table for the arrangements in FIGS. 7a and 7b andFIGS. 8a and 8b shown in the input/coupler unit combinations;

FIG. 10 is a schematic diagram of the architecture for an opticalcorrelator with M coupler stages; having a 3-coupler unit and adifferential amplifier located at the output stage;

FIG. 11 shows a seven stage optical correlator based on the arrangementshown in FIG. 10 and arranged to receive a particular M-sequence;

FIG. 12 depicts the optical correlator of FIG. 11 fully loaded with acomplete matching sequence to provide a differential amplifier output of+7;

FIG. 13 depicts the optical correlator of FIG. 11 fully loaded with adifferent sequence so that only three coupler units match therebyproviding a differential amplifier out of -1;

FIGS. 14A and 14B are schematic representations similar to FIG. 2 inwhich the zero couplers are omitted (but are represented by brokenlines);

FIG. 15 (a) to (d) input coupler combinations similar to those shown inFIGS. 3(a) to (d);

FIG. 16, 17(a) and (b), FIGS. 18A and 18B, FIG. 19, FIG. 20, and FIG. 21correspond to FIGS. 5, 6(a) and (b), FIG. 7(a) and (b), FIG. 11, FIG.12, and FIG. 13 respectively in which the zero couplers have beenomitted, but are represented diagrammatically in broken outlines;

FIGS. 22 (a) through (d) are diagrammatic representations of opticalhardware for a complementary coding arrangement;

FIG. 23 is the corresponding truth table for FIG. 22;

FIG. 24 depicts the hardware for an optical correlator similar to thatshown in FIG. 11 but showing the complementary coding sequence describedwith reference to FIGS. 22A through 22D;

FIG. 25 depicts the optical correlator when fully loaded and correspondsto FIG. 13;

FIG. 26 depicts a correlator with output processing arrangements tocontrol the transfer of correctly received data to a user in accordancewith a further embodiment of the invention;

FIG. 27 depicts an alternative output processing arrangement to thatshown in FIG. 26;

FIG. 28 depicts a further alternative arrangement of output opticalprocessing of that shown in FIGS. 26 and 27;

FIG. 29 depicts an alternative arrangement similar to that shown in FIG.28;

FIG. 30 depicts an output processing arrangement for use by multipleusers;

FIG. 31 depicts an alternative embodiment of a multiple users outputprocessing arrangement similar to that shown in FIG. 30, and

FIGS. 32(a) through (c) depict differential arrangements for use withthe processing circuitry shown in FIGS. 30 and 31.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Reference is first made to FIG. 1 of the drawings which depicts a doublecoding arrangement necessary to implement the optical processingtechnique of the present invention and to enable the optical correlatorshereinafter described to work effectively. FIGS. 1 to 5 show thearrangement for use with a single user at a time. In FIG. 1 it can beseen that in coding stage 1 every binary "1" is converted into asequence x and every binary "0" is converted into sequence x. At theoutset, it should be understood that sequence x is not the mathematicalcomplement of x. It is just a convenient way to write the sequence intowhich the digital 0's have been encoded.

The second coding stage involves converting each binary "1" in thesequences x and x into (01) and every binary "0" in the sequences x, xinto (10), as is also illustrated in FIG. 1. The 0 signifies no lightpulse whilst a 1 signifies the presence of a light pulse. The digits of(01) or (10) are soDarated by time period T.

FIGS. 2A through 2B depict an optical coupler representation of +1 (01)and 0 (10) in FIGS. 2a and 2b, respectively. It will be seen that each 1and 0 in the destination address is represented by the optical couplersshown in FIG. 2. In this case "0" corresponds to a 0% coupling ratio and"1" corresponds to, for example, a 5% coupling ratio (that is, assuming5% of the input signal is sufficient to provide a detected output valueof 1).

We shall now consider the situation when information or data consistingof (01) or (10) are received and correlated with coupler units set toreceive 01 (+1) or 10 (0). The four possible situations are:

(a) The received sequence is 01 and this enters the coupler unit (+1)programmed to receive 01;

(b) The received sequence is 10 and this sequence enters the couplerunit (+1) programmed to receive 01;

(c) The received sequence is 01 and this enters the coupler unit (0)programmed to receive sequence 10, and

(d) The received sequence is 10 and this enters the coupler unit (0)programmed to receive the sequence 10.

The four possible combinations (a) to (d) listed above are schematicallyshown in FIGS. 3a to d of the accompanying drawings are also explainedwith reference to FIG. 4 which is the input-output truth table for thecoupler unit for various combinations (a-d) of input and coupler unitdata. As can be seen from FIGS. 3a and 3d when the input sequences (01or 10) match with the coupler arrangements, also 01 or 10, the coupleroutputs are 010. For the two cases shown in FIGS. 3b and 3c, which arecases of mismatch, that is input 01, coupler set to 10 and vice versa,the coupler outputs are 100 and 001. Thus, it can be seen from theoutputs shown in the truth table of FIG. 4 that only if there is a matchthe middle "timeslot" output is a binary 1, otherwise the output is 0.

The above description is of a single optical coupler pair, ie one stage.However, reception of a sequence transmitted data, a practical opticalcorrelator will require M coupler stages, as shown in FIG. 5, to receivea code sequence of length M, ie M pairs of binary digits. It will beseen that the coupling stages are arranged as described in theaforementioned international publication No. WO90/04823 with the primarychannel in each stage connected to successive stages, each `stage`within the primary channel having a delay of period T. The secondcoupler of each stage has an output from the coupled channel which iscoupled to an M to 1 coupler as shown in FIG. 5. Thus M outputs are fedto the input of the M to 1 coupler. The output of the M to 1 coupler isof particular interest and there are three possible combinations ofreceived sequence and M-stage optical correlator, which are as follows:

(a) Total mismatch at the M to 1 coupler output between the receivedsequence and correlator taps.

(b) Partial mismatch at the M to 1 coupler output between the receivedsequence and correlator taps.

(c) A complete match between the received sequence and correlator taps.

In the case of a total mismatch (a) there is no contribution from any ofthe optical units/correlator taps. It should be understood that only themiddle time slot is of interest. In the case of a partial mismatch, thatis, (b) above, the output of the M to 1 coupler depends on the number of"matches" of 01's and 10's giving an M to 1 coupler output with anamplitude corresponding to the number of matches. In the case of acomplete match between the received sequence and the optical correlatortaps, (c) above, every correlator tap is matched and the M to 1 coupleroutput is M units in amplitude.

It should be understood that for a code sequence of M bits the output ofthe M to 1 coupler is only of interest when the correlater is fullyloaded, that is all M optical coupler stages have received data.

The optical processor described above with reference to FIGS. 1 to 5, issuitable for single user operation at any one time.

It is possible to use the optical correlator described with reference toFIGS. 1 to 5 in a modified form so that multi-user operation ispossible. This is best explained with reference to FIG. 6 of theaccompanying drawings. In this case, the M to 1 coupler output is passedthrough a further 3-coupler stage as shown in FIG. 6a or 6b. Eachcoupler "1" represents a certain coupling ratio which is sufficient togive a detected value of "1". The truth table shown in FIG. 4 is alsoapplicable in this case so that (a) and (d) correspond to the situationwhere the received bit pair match the coupler unit, ie the middle timeslot contains a binary 1.

Reference is now made to FIG. 7 in (a) which shows the twoinput/coupler-unit combinations with M to 1 couplers connected to theoutput as shown in FIG. 6a. The output of the differential amplifier isof interest when the M to 1 coupler output is fully loaded as in the3-coupler stage shown in FIGS. 7a and 7b. As described above, in thecase of "matching", the M to 1 coupler outputs are 010. Because themiddle coupler in the 3-coupler stage is fed to the positive input ofthe differential amplifier, the differential amplifier output is also+1.

In the case of a mismatch, as shown in (b) or (c) in FIG. 4 the M to 1coupler outputs are 001 or 100 that is, the middle coupler output in the3-coupler unit is 0 and one of the others is a 1. This set ofmismatching conditions is depicted schematically in FIG. 8a and 8b. Ineach of these cases, the final output of differential amplifier is -1.

FIG. 9 is a truth table for the optical coupler unit with differentialamplifier for the arrangements shown in FIGS. 7a and 7b and FIGS. 8a and8b. It can thus be seen that the two outputs of the differentialamplifier are only +1 when the input sequence and coupler unit sequencematch.

Reference is now made to FIG. 10 of the drawings which depicts thearchitecture of an optical correlator having M coupler stages forreceiving sequences of M pairs of bits. As described above, there arethree particular situations of interest; a complete mismatch, a partialmismatch and a complete match.

For a complete mismatch, the contribution of each coupler stage is 001or 100. In the 3-coupler stage connected to the output of the M to 1coupler, the middle coupler contributes a binary 0 whilst the other twocouplers are summed on to the negative input of the differentialamplifier, thus providing an output at the differential amplifier of -M.

In the case of a partial mismatch, the differential amplifier outputwill depend on the number of "matches" and the number of "mismatches",and the output could be positive or negative. In the case of a completematch, the output of the differential amplifier is +M.

Although optical detection followed by differential amplification doescompromise the speed advantage, nevertheless balanced receivers in theGHz range are available, ie the electronic differential amplifier.

It will be understood that the optical correlator architecture, anexample of which is perhaps best shown in FIG. 10, opens up newapplications, depending on the type of code used, for example,M-sequence, gold codes, complementary codes, prime codes, etc. In thecase of M sequences which have some very simple but interestingproperties, such as: (for code length N) the auto-correlation value (aperfect match is N) and for all other shifted versions of the code, thevalue is -1, that is, a mismatch. Thus, using the correlatorarchitecture of the second version, that is, the multi-user operation,in which the output of the differential amplifier is monitored atcertain time instances, the output consists of desired signals formatching and undesired signals for mismatching. The principal advantageof this arrangement is that the same channel can carry multiple userssimultaneously.

This is best explained with reference to the following example in whicha 7 digit data sequence is supplied to an optical correlator havingseven stages is shown in FIG. 11.

Using the M(7)-sequence: 1110010 (desired signal) eq (1) and shiftedversion of this: 0101110 (undesired signal) eq (2)

    1110010                                                    (equation (1)

    0101110                                                    (equation (2)

Replacing 1's with 01's and 0's with 10's as required for the secondstage of coding in the invention:

    eq (1)=>01-01-01-10-10-01-10                               (eq (3)

    eq (2)=>(10)-(01)-(10)-(01)-(01)-(01)-(10)                 eq (4)

In equations (3) and (4), for multi-user examples, there is a delay of2T necessary to prevent data overlap between adjacent (10), (01) pairs.This is represented by "-". The optical correlator of FIG. 11 ispre-programmed in the form of eq 3 above to receive the M-sequence1110010 as shown in eq 1 above and as best depicted by inspecting thestages shown in FIG. 11. It should be understood that the correlator isalways appropriately handed to the data so that it can be read when full(that is, the stages must be read from right to left in FIG. 11). Thedifferential amplifier output of the optical correlator shown in FIG. 11is only relevant when the received sequence of data shown in equation 3or 4 is fully loaded in the optical correlator.

With reference to FIG. 12, it will be seen that the data in equation (3)is fully loaded in the optical correlator. In FIG. 12 each coupler unitis matched and 1's and 0's above the respective couplers representpreset "values" and 1's and 0's below the couplers represent the inputsequence values at the instant the correlator is fully loaded. Thus, inthe case of a perfect match, the output of the M to 1 coupler in FIG. 12is 070 which, after passing through the 3-coupler stage, provides andoutput of +7 at the output of the differential amplifier.

FIG. 13 depicts the same optical correlator programmed as before buthaving the received sequence of data shown in equation (4) fully loadedinto the correlator. With this data, three optical coupler units matchand four optical coupler units are mismatched, so that the output at thedifferential amplifier is -1 (ie, 3 matched--4 mismatched).

Thus, if the output of the optical correlators shown in FIGS. 12 and 13are considered simultaneously, the combined differential amplifieroutput will be +7-1=6, that is, the desired signal minus the undesiredsignal.

It will be appreciated that the operating principles of a correlatorarchitecture of optical signal processing apparatus have beenhereinbefore described. The type of correlator described hasapplications in areas of high-speed, guided-wave communications networksand in multiplexed sensor networks. In communication applications, thehigh-speed multiple-access advantages are strengthened due to itscompatibility with the optical fibre medium.

Reference is now made to FIGS. 14A to 21 of the drawings whichcorrespond to some of FIGS. 1 to 13 except that the `0` couplerrepresenting a 0% coupling ratio, has been omitted. The inclusion of thezero coupler is not strictly necessary and was included in the earlierdescribed embodiments for ease of understanding. The position of the `0`coupler is shown by the dotted line. The corresponding arrangementsreferred hereto, operate in exactly the same manner and are lessexpensive, as the `0` couplers are not required.

It will also be appreciated that various modifications may be made tothe embodiments hereinbefore decided without departing from the scope ofthe invention.

For example, in the second coding stage, each 1 or 0 bit can be encodedinto a code with at least two digits, but with each resulting codehaving the same number of digits. For example, 1 may be encoded into0001 and 0 to 1000. The two 4 bit codes overlap by 1 digit but toproduce a 7-digit output and, in this case, the middle digit, ie 4th bitonly is examined for matching or mismatching. This technique isapplicable to codes with any number of bits although, for practicalreasons such as processing speed, it is desirable that the coding bekept relatively small. Thus, two 3 bit codes produce a 5 digit output ortwo 5 bit codes produce a 9-digit output code, In general terms, codesof N bits create an output code 2N-1 bits in length and the Nth bit isexamined for matching or mismatching.

In the embodiments hereinbefore described, the second coding stageinvolves:

    1 being coded to 01

    0 being coded to 10

It is possible to use a complementary coding arrangement wherein:

    1 is coded to 10

    0 is coded to 01

Thus, for 4 cases of input:

(a) 1 (10) coupler unit set to 1 (10)

(b) 1 (10) coupler unit set to 0 (01)

(c) 0 (01) coupler unit set to 1 (10)

(d) 0 (01) coupler unit set to 0 (01)

there are 4 possible outputs as can best be seen from FIGS. 22 and thecorresponding truth table in FIG. 23. As in the first embodiment, amatch only occurs if the middle digit is a binary `1`. Using the sameM-sequence described with reference to FIG. 11 as an example: 1110010and coding 1->10; 0->01 the sequence becomes(10)-(10)-(10)-(01)-(01)-(10)-(01) where (-) represents an extra 2Tdelay between bits for synchronisation. The hardware for the appropriateoptical correlation is shown in FIG. 24. The output of the correlator is070 when fully loaded.

For the case when the M-sequence input is a shifted version, ie 0101110and the coupler units are set receive 1110010.

That is input ->0101110 with coding 1 ->10 0->01

the input becomes (01)-(10)-(01)-(10)-(10)-(10)-(01) where (-)represents a 2T delay between bits. The optical correlator, when fullyloaded, is shown in FIG. 25. In this case, there are 3 matches and 4mismatches. The input is the shifted version 0101110. Thus, becausethere are 3 matches and 4 mismatches when fully loaded, the output is3-4=1.

Reference is now made to FIGS. 26-32C of the accompanying drawings inwhich the output of the optical processing apparatus described in FIGS.1-25 is processed to control the reception of data to a receiver (notshown). FIGS. 26-32C describe output processing units (thresholdingstages) for single users and FIGS. 22 and 23 describe output processingunits (thresholding stages) for multiple users.

All optical self routing of information, for example, headerrecognition, should also be possible thus avoiding bottlenecksassociated with control electronics in current routing systems.

Reference is now made to FIG. 26 of the drawings in which opticalprocessing apparatus generally indicated by reference numeral 100, hasan output from a summation device 102 which is fed to a threshold device104. The thresholding device is a level comparator so that only if asignal from the summation device 102 equal to a maximum, that is M, thenthe threshold device provides an output which is fed to AND gate 106.The AND gate 106, receives a second input from an external trigger 107which is synchronised with the data received, that is, all of thecorrect data pulses have been stored in the optical signal processorwhereupon the output of the AND gate is fed to a switch 108. At thisparticular time, the data input forms the input to the switch and onreceipt of the correct output from the AND gate 106, the switch 108 isopened and the data is passed through the switch 108 to the output forsubsequent processing.

If the output of a summation device 102 is less than M, then there is nooutput from the thresholding device 104 and, consequently the AND gate106 does not provide an output pulse to actuate the switch 108 andconsequently, the input data is not passed to the output of the switch108.

Reference is now made to FIG. 27 of the drawings which depicts analternative arrangement to the output processing device shown in FIG.26. In this case, the optical processing unit 110 has a code which ispreceded by a special pulse 112. The summation device 114 is coupled toa threshold device 116 as in FIG. 26 and the output from the thresholddevice 116 is only provided if the pulse is of M magnitude, ie allcouplers matching. The header pulse is used to provide to the AND gate118 and the output of the AND gate 118 is fed to one input of the switch120. The switch 120 allows the input 122 to be transferred to the output124 for a fixed period of time and, as in FIG. 26, the input data whichis fed to the input of the switch is only switched to the output 124upon receipt of the appropriate control pulse from the AND gate 118. Itshould be understood that the arrangements in FIGS. 26 and 27 require athresholding device which can handle multiple levels. In FIGS. 26, 27the `T` delay is the time delay between units.

Reference is not made to FIG. 28 of the drawings which shows yet anotheralternative arrangement to those shown in FIGS. 26 and 27. In this case,the optical processor has a summation unit 130 the output of which ispassed through a three-coupler output stage, generally indicated byreference numeral 132, and which provides two outputs, H and L which arefed to the respective gates 134 and 136 which are in-line as shown. Thegate 134 receives a trigger pulse input 135 which is supplied externallyand the output of gate 134 is also fed to another input of gate 136. Inthis control circuitry, when the trigger pulse is supplied to gate 134it will only provide an output if there is a match in all of the opticalcouplers in the optical processing stage and thus, an output is fed tothe input of gate 136. Similarly, the gate 136 only provides a highoutput and allows transmission of the trigger pulse if the L input ofthe gate is 0. In this case, the trigger pulse is switched through tothe input of switch 138 which allows information of data at the input140 to be transferred to the output 142.

FIG. 29 depicts an alternative arrangement to that shown in FIG. 28 andin this case, a special header pulse is used as in the same manner asshown in FIG. 27. In this case, when there is an output from M from thesummation device 150, the output from the centre coupling unit is amaximum. The special pulse is used to provide an input to an amplifier152, if desired, which is used to generate a trigger pulse 154 whichforms an input to the gate 156. The amplifier 152 may be omitted ifrequired. The gate only allows the trigger pulse to pass if the otherinput is a logical high, ie all couplers in the optical processing unitmatching and in such a case, the trigger pulse passes to the input ofgate 158. AND gate 158 only allows the trigger pulse to pass if theother input is a logical low and in such a case, the trigger pulsepasses to the switch 160. As described above, the switch 160 receivesthe data being transmitted behind the header pulse and the data is onlypassed to the receiver when a pulse is received at the input 162.

Reference is now made to FIG. 30 of the drawings which depicts an outputprocessing arrangement for use by multiple users and in which anexternal timing trigger such as an optical pulse is used. Opticalprocessing apparatus generally indicated by reference numeral 170, has asummation device 172, the output of which is coupled to a three-stageoptical processing stage 174. The "H" and "L" outputs of the stage 174are fed to an add/subtraction 176 and the sole function of theadd/subtraction unit 176 is to provide a differential output.

The differential output (H-L) is fed to a thresholding stage 178 whichonly provides an output if the difference value is above a presetthreshold. An external timing trigger in the form of an optical pulse180 is fed to one input of an AND gate 182 and the AND gate onlyprovides an output if the output of the thresholding stage is a maximumso that the timing pulse is passed to the switch 184, and only onreceipt of this timing pulse does the switch 184 allow the data input tobe fed to the data output for a subsequent processing by the receiver.

The add/subtraction unit 176 may be electro-optic or all optical. FIG.32a shows one possibility using an electronics differential amplifier toimplement the subtraction. An alternative electro-optic possibility isshown in FIG. 32b in which case the add/subtraction unit is implementedby a balanced receiver. FIG. 32c depicts an optical add and subtractionunit in which case all optical signal processing is used and AND gate182 is also an optical gate.

Reference is now made to FIG. 31 of the drawings which is similar toFIG. 30 for a multiple user arrangement, except that a header is used toprovide a trigger pulse instead of an external trigger in a similarmanner as shown in FIG. 27. In this case, the optical processingapparatus is generally indicated by the reference numeral 200 as thesummation unit 202, the output of which is coupled to a three-stageoptical coupler generally indicated by reference numeral 204. Theoutputs of the optical coupler, H, L are fed to an add/subtraction unit206 in the same fashion as that shown in FIG. 30 The output of theadd/subtraction unit (H-L) is fed to one input of an AND gate 208. Onthe other input of the AND gate 210 receives a trigger pulse signal fromthe header from the optical processing apparatus. When the H-Ldifference is above a preset threshold and the trigger pulse is alsoreceived, the AND gate provides an output to the switch 210 and only onreceipt of this pulse is the switch 210 opened to pass the data at theinput to the output for subsequent processing by a receiver. In FIGS. 28to 31 the (2T) delay shown is the spacing between couplers.

It will be appreciated that the add/subtraction unit 206 may beimplemented by any of the arrangements shown in FIG. 32a, b and c.

FIG. 29 depicts an alternative arrangement to that shown in FIG. 28 andin this case a special header pulse is used as in the same manner asshown in FIG. 27. In this case, when there is an output of M from thesummation device 150, the output from the centre coupling unit is amaximum. The special pulse is used to form the input to a linearoperational amplifier which is used to generate a trigger pulse 154which forms an input to the gate 156. The gate only allows the triggerpulse to pass if the other input is a logical high and, in such a case,the trigger pulse passes to the input of gate 158. AND gate 158 onlyallows the trigger pulse to pass if the other input is a logical low andin such a case the trigger pulse passes to the switch 160. As describedabove, the switch 160 receives the data being transmitted behind theheader pulse and the data is only passed through the receiver when apulse is received at the input 162.

It will be understood that, although the embodiments hereinbeforedescribed are concerned with the serial processing of data, theprinciples of the invention are applicable to parallel data processingsystems.

What is claimed is:
 1. An optical processing system for identifying whenan incoming optical signal has reached its correct destination, saidoptical processing system comprising,data transmission means fortransmitting optical signal data, data encoding means coupled to saiddata transmission means and to an optical transmission medium, and adata receiver coupled to said optical transmission medium, said dataencoding means comprising first encoding means for encoding a binary `1`in the data into a first code sequence and for encoding a binary `0` inthe data into a second code sequence, second encoding means for encodingeach binary `1` in the first and second code sequences into a first pairof digits, and for encoding each binary zero in the first and secondcode sequences into a second pair of digits, the second pair of digitsbeing the complement of the first pair of digits, the digits in each ofsaid first and said second pair of digits being separated by time T,said data receiver having at least one optical coupling stage, the oreach optical coupling stage having an optical coupler with a `1`coupling ratio, the coupling stage having a principal channel with atime delay T and a coupled channel, the location of the time delay Trelative to the optical coupler determining whether the receiver is a 10or a 01 coupling stage, each data receiver providing an output over aperiod of time at intervals of T and the arrangement being such that thedata for optical coupling stages provides an odd number of 2N-1 outputswhere N is the number of stages, and means for monitoring the value ofNth digit, to determine if the incoming Signal has reached its correctdestination.
 2. An optical processing system as claimed in claim 1wherein each optical coupling stage has two optical couplers, oneoptical coupling stage having a coupling ratio of `0` and the otheroptical coupling stage having a coupling ratio of `1`, the couplersbeing coupled by a principal optical channel with a time delay T betweensaid couplers and also being coupled by a coupled optical channel.
 3. Anoptical processing system as claimed in claim 1 wherein said datareceiver has M optical coupling stages for receiving a code sequence ofM pairs of double- coded data, each optical coupling stage having anoutput coupled to a common M to 1 coupler unit, and means for monitoringthe output of the M to 1 coupler unit which is being capable ofdetecting a complete match, a complete mismatch or a partial mismatch ofdata by said data receiver.
 4. An optical processing system as claimedin claim 3 wherein said data receiver has a 3-optical coupler stageconnected to the output of the M to 1 coupler unit, each coupler in said3-optical coupler stage having a `1` coupling ratio, the outputs of thefirst and third stages forming a first input to a comparator and theoutput of the second stage forming a second input to the comparator, thecomparator having an output which can be monitored to detect receivedsignals which are matched or mismatched, the matched signal having anamplitude of +M where M is the number of stages in the opticalprocessor.
 5. An optical processing system as claimed in claim 3 whereinthe output of the M to 1 coupler unit is coupled to a receiver outputprocessing unit which, if the correct data has been received at thereceiver, controls a switch to allow the correctly identified data to beprocessed subsequently by the correct user.
 6. An optical processingsystem as claimed in claim 1 wherein a block of data, a data header, isassigned an address each `1` and `0` of which is coded by coding meansinto 10 or 01 as required to form a header which is then fed to thereceiver output processing unit which includes gate means actuated by anexternal trigger and by a signal indicative of the correct header beingreceived by the receiving stage to control a switch means to allow datafollowing the header to be passed to the correct user.
 7. An opticalprocessing system as claimed in claim 5 wherein an add-subtraction unitis incorporated in the output processing stage for determining if thecorrect signal has been received by the receiver, the add/subtractionunit having an output coupled to said gate means.
 8. An opticalprocessing system as claimed in claim 7 wherein the add-subtraction unitis an optical or electro-optical device.
 9. A method of processingoptical data so that a desired optical signal can be correctlyidentified and received by a receiver, and so that undesired signals canbe rejected, said method comprising the steps of,a) at a transmissionlocation, identifying whether a data bit is a binary `1` or a binary`0`; b) if the data bit is "1", coding the bit into a first codesequence, and if the data bit is "0" coding the bit into a second codesequence different from the first code sequence; c) coding each "1" insaid first and second code sequences into a first pair of binary digits(01) or (10) and coding each "0" in said first and second code sequencesinto a second pair of binary digits, (10) or (01) respectively, thesecond pair of digits being complementary to the first pair of digitsthe digits of each 01 and 10 pair being separated by time T; d)receiving the encoded data from an optical transmission medium in atleast one optical coupling stage provided by at least one opticalcoupler having a coupling ratio of binary `1`, each optical couplerstage having a coupling value set to 01 or to 10 to provide a hardwarerepresentation of 01 or 10 coding, respectively; e) processing theoutput of the coupling stage to provide 2N-1 outputs each separated bytime T where N is the number of coupling stages and N=2, 3, 4 and f)monitoring the Nth output for the presence of a desired digital signal,the presence of the digital signal in said Nth output above a certainpreset threshold indicating a match, that is, the desired signal hadbeen received at the correct receiving station.
 10. A method as claimedin claim 9 wherein the desired digital signal is a binary 1,
 11. Amethod as claimed in claim 9 wherein a plurality of M coupling stagesare provided and the outputs in each stage are connected in parallel toan M to 1 coupler for summing the outputs to determine the degree ofmatching,
 12. A method as claimed in claim 10 wherein the methodincludes the step of processing the output of the M to 1 coupler in a3-coupler stage with each coupler having a "1" coupling ratio andcoupling the first and third couplers in said 3-coupler stage to a firstinput of a comparator, and coupling the second coupler to a second inputof said comparator, said first and second inputs of said comparatorbeing compared and providing an output signal from which the degree ofmatching or mismatching can be monitored.
 13. A receiver for use with anoptical coupling system, said receiver comprising a plurality of opticalcoupling stages, each optical coupling stage having at least one opticalcoupler, each optical coupler being coupled by a principal channel witha time delay of T associated with the coupler of each stage and eachstage being separated by a time delay of at least T, the location of thetime delay T in each stage determining whether the stage is an 01 or 10coupler, each coupler having a coupled channel connected to an M to 1coupler for summing the outputs of all of the coupling stages to providea combined output, the combined output determined whether the correctdata has been received in the receiver.
 14. A receiver as claimed inclaim 13 wherein each stage has two optical couplers, one coupler havingan `0` coupling ratio and the other coupler having a `1` coupling ratio.The time delay between stages is. 2T for multi-user applications.
 15. Areceiver as claimed in claim 13 wherein said data receiver has M opticalcoupling stages for receiving a code sequence of M pairs of double-codeddata, each optical coupling stage having an output coupled to a common Mto 1 coupler unit, and means for monitoring the output of the M to 1coupler unit which is being capable of detecting a complete match, acomplete mismatch or a partial mismatch of data by said data receiver.16. A receiver as claimed in claim 13 wherein also said data receiverhas a 3-optical coupler stage connected to the output of the M to 1coupler unit, each coupler in said 3-coupler stage having a `1` couplingratio, the outputs of the first and third stages forming a first inputto a comparator and the output of the second stage forming a secondinput to the comparator, the comparator having an output which can bemonitored to detect received signals which are matched or mismatched,the matched signal having an amplitude of +M where M is the number ofstages in the optical processor.
 17. A receiver as claimed in claim 13wherein the output of the M to 1 coupler unit is coupled to a receiveroutput processing unit which, if the correct data has been received atthe receiver, controls a switch to allow the correctly identified datato be processed subsequently by the correct user.